EmbeddedCIEmbeddedCI
HomeResourcesDocumentationContact
Sign inSign up

BenchPod pin-out

Where everything is on the board, and what each pin does. Both diagrams look down at the pod in the same orientation, so the LA1 corner of the header points at the SMA end in each of them.

J1: the logic-analyzer header

A 2×11 header carrying the LA channels plus power, ground, CAN, an LA-bank voltage reference and target reset. Even pins run down one side and odd pins down the other, with pin 1 (LA1) at the bottom right: the square pad, at the ADC/DAC end of the board. The LA channels have no role-named pins: there is no pin marked SWCLK, so you choose which channel carries which signal and record that mapping once, in the pod's wiring profile (the web app's Wiring tab), which tests read as benchpod_wiring.

BenchPod J1 header pinoutA 2 by 11 header shown with pin 1 at the bottom right, on the ADC and DAC side of the pod. Even pins 2 to 14 run down the left and are LA2, LA4, LA6, LA8, LA10, LA12 and LA14; odd pins 1 to 13 run down the right and are LA1, LA3, LA5, LA7, LA9, LA11 and LA13. Pins 15 and 16 are ground, pin 17 is plus 3.3 volts, pin 18 is plus 1.8 volts, pin 19 is CAN plus and pin 20 is CAN minus. Pin 21 is LA_REF, a reference output at the LA bank's configured voltage, and pin 22 is NRST_CONTROL, the pod's dedicated target-reset line. LA1 to LA6 have pull-up resistors, LA7 and LA8 have pull-downs, and LA9 to LA14 have neither. LA13 and LA14 need firmware 3.1 or newer.pull-upspull-downsNRST_CONTROL2221LA_REFCAN−2019CAN++1V81817+3V3GND1615GNDLA141413LA13LA121211LA11LA10109LA9LA887LA7LA665LA5LA443LA3LA221LA1▼ ADC / DAC side of the podpin 1 (LA1) is the square pad (bottom right, at the ADC/DAC end)LA1–LA6 pull-ups, LA7/LA8 pull-downs (3.3 V only); LA9–LA14 neitherLA13 / LA14 need firmware 3.1 or newerLA_REF (21) is the LA reference; NRST_CONTROL (22) drives resetJ1, looking down at the pod: LA1 at the bottom right

Eight of the fourteen channels carry a fixed bias network, and they do not all pull the same way: LA7 and LA8 pull down. Each is switched in and out individually; all of them are off (high-Z) at boot.

LA channelNetworkValueGood for
LA1, LA2pull-up4.7kOpen-drain buses: an emulated or real I2C bus goes here
LA3, LA4pull-up2.2k
LA5, LA6pull-up10k
LA7, LA8pull-down10kHolding a line low by default, such as a boot-mode or enable strap
LA9 – LA14none—Anything that must float; nothing biases these

The resistors hang off +3V3 rather than the LA bank rail, so the pod engages them only while the bank is at 3.3 V. At 1.8 V an enable is refused and anything already on is released. In a test, pins.has_pullup(n) and pins.has_pulldown(n) answer this per channel rather than hard-coding it. Engage one with enable_pullup(n) on LA1–LA6 or enable_pulldown(n) on LA7/LA8; enable_pullup(7) raises ValueError.

The wiring profile checks its assignments against this table. It warns when I2C sits on LA9–LA14 (no pod pull-up, so the bus needs external pull-ups) or on LA7/LA8 (pull-downs, so keep them disabled on an open-drain bus), and when UART RX is on LA7/LA8 (the UART idles high, so keep the pull disabled). Two signals on one channel is an error.

Two more pins sit past CAN: LA_REF (21) is a reference output at the LA bank's configured voltage (1.8 V or 3.3 V), useful as a logic reference for external circuitry, and NRST_CONTROL (22) is the pod's dedicated target-reset line, the same one driven by flash(nreset=True) and reset_target.

Connectors on the board

The same view, zoomed out to the whole pod:

BenchPod connector layoutThe pod seen from above. Along the top edge, left to right: an RJ45 Ethernet jack, a USB-C connector that carries the console, a green 5 volt output screw terminal whose positive pin is on the left and negative on the right, and a USB-A connector wired to that same 5 volt output. Both are the same rail behind one on/off switch, just two different connectors. Along the bottom edge, left to right: a green 4 to 20 milliamp output screw terminal whose minus pin is on the left and positive pin on the right, then four SMA connectors, each in its own color and each with a small test-point pair just to its right, close to the board edge, whose top pin repeats that connector's color and whose bottom pin is gray for ground: 0 to 3.3 volt DAC in blue, 0 to 5 volt DAC in indigo, plus or minus 12 volt DAC in violet, and plus or minus 30 volt ADC in pink. Finally a green 4 to 20 milliamp measurement screw terminal whose ground pin is on the left and positive pin on the right. Every screw terminal's ground or minus pin is gray and its positive pin is red. On the right edge near the top are two green screw terminals: the upper one is the 0 to 20 volt output, the lower one is the 5 to 20 volt input; both have ground on their lower pin. On the left edge, in the middle, is the J1 logic-analyzer header, with LA1 at its bottom right corner nearest the SMA end.RJ45USB-C5V out+−USB-Asame railone switch0–20 Voutput+GNDInput5–20 V+GNDJ1: LA headerLA1 at the bottom-right ↘−+4-20 mAoutputGND+4-20 mAmeasurement0–3V3DAC0–5VDAC±12VDAC±30VADCLooking down at the podgreen = screw terminalgray = GND / minus, on every terminal, header and test point in this diagramred = + on every screw terminal; USB-A carries the same rail as 5V outeach SMA and its test point's top pin share a color, so a probe traces straight back0–3V3 DAC0–5V DAC±12V DAC±30V ADC
  • Top edge: the RJ45 jack (wired Ethernet, the pod's primary network interface), the USB-C connector that carries the console, a green 5V out screw terminal (positive on the left; negative, the black lead, on the right), and a USB-A connector wired to that same 5V rail. The screw terminal and the USB-A port are the same output behind one on/off switch, just two different connectors for it.
  • Right edge, towards the top: two green screw terminals. The upper one is the 0–20 V output; the one below it is the input, which accepts 5–20 V. Both have GND on their lower pin.
  • Bottom edge: a green 4–20 mA output screw terminal (minus on the left, plus on the right; plus goes to the loop supply), then four SMA connectors, each drawn in its own color (0–3V3 DAC blue, 0–5V DAC indigo, ±12V DAC violet, ±30V ADC pink), and finally a green 4–20 mA measurement screw terminal (GND on the left, plus on the right). Each SMA has its own small test-point pair just to its right, close to the board edge. The top pin repeats that SMA's color, and the bottom pin is gray for GND. Gray marks GND or minus on every terminal in this diagram, and red marks plus.
  • Left edge, middle: J1, the LA header above, with LA1 at the corner nearest the SMA end.

Some boards have a small blue trimmer in the analog section, near the ±30V ADC input. It sets how the ADC handles fast signals (above about 10 kHz) and has no effect on DC readings. Leave it as it is. Not every board has one: newer boards use a fixed capacitor instead.

Choosing the DAC output

Connect your board to the one DAC SMA its pin tolerates, and pick the same output on the Generator and Capture tabs. A 3.3 V MCU pin belongs on 0–3V3: the 0–5V and ±12V outputs can drive more than it takes. The web app starts on the 3.3 V output until you pick another one, then remembers your choice for that pod in your browser. If the bench has a control loop output stage in its wiring, it starts on the stage's output instead.

Wiring the 4–20 mA output

The output is a two-wire transmitter. It does not source current. An external loop supply of 12–30 V powers the loop, and the pod sets how much current flows: supply plus to the plus pin, the minus pin through the receiver to supply minus. The current follows the DAC, from about 4 mA at zero to 20 mA at full scale, whichever DAC output is selected. To set it in mA, pick 4-20 mA output (J9) as the output on the Generator tab. To read a loop on the measurement terminal in mA, pick 4-20 mA input (J8) as the ADC input on the Capture tab.